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 19-2049; Rev 0; 5/01
Dual-Audio, Log Taper Digital Potentiometers
General Description
The MAX5408/MAX5409 are dual logarithmic taper digital potentiometers with 32-tap points each. The MAX5408 is a dual potentiometer with one wiper per potentiometer. The MAX5409 is a dual potentiometer with two wipers per potentiometer (see Functional Diagram). An SPITM-compatible serial interface controls the wipers. The MAX5408/MAX5409 have a factory-set resistance of 10k per potentiometer. A zero-crossing detect feature minimizes the audible noise generated by wiper transitions. These devices are ideal for audio applications requiring digitally controlled resistors. The MAX5408/MAX5409 have nominal resistor temperaturecoefficients of 35ppm/C end-to-end and 5ppm/C ratiometric. The MAX5408/MAX5409 are available in 16-pin QSOP and 16-pin QFN packages and are specified over the extended temperature range (-40C to +85C). o 32-Tap Positions for Each Wiper o Small 16-Pin QSOP/QFN Packages o +2.7V to +3.6V Single-Supply Operation o Low 1A Supply Current o Zero-Crossing Detection for Clickless Switching o Mute Function to -90dB o 10k Fixed Resistance Value o 3-Wire SPI-Compatible Serial Data Interface o Power-On Reset: Wiper Goes to Maximum Attenuation o Digital Output for Readback and Daisy-Chaining Capabilities
Features
o Log Taper with 2dB Steps Between Taps
MAX5408/MAX5409
Applications
Stereo Volume Control Fading and Balancing Stereo Signals Mechanical Potentiometer Replacement
SPI is a trademark of Motorola Inc. Functional Diagram appears at end of data sheet.
Ordering Information
PART MAX5408EEE MAX5408EGE MAX5409EEE MAX5409EGE TEMP. RANGE PINPACKAGE WIPERS PER RESISTOR 1 1 2 2
-40C to +85C 16 QSOP -40C to +85C 16 QFN -40C to +85C 16 QSOP -40C to +85C 16 QFN
Pin Configurations
TOP VIEW
DIN 16
DOUT 1 DIN 2 SCLK 3 CS 4 H0 5 L0 6 W0A 7 N.C. (W0B) 8 16 VDD 15 VLOGIC 14 GND DOUT VDD VLOGIC
15
14
SCLK
1
13 12
GND
MAX5408 MAX5409
13 AGND 12 H1 11 L1 10 W1A 9 N.C. (W1B)
CS
2
11
AGND
MAX5408 MAX5409
H0 3 10 H1
L0
4
9
L1
QSOP (5mm x 6mm)
( ) ARE FOR MAX5409 ONLY
5
6
7
W0A N.C. (W0B) N.C. (W1B)
W1A
QFN (4mm x 4mm)
________________________________________________________________ Maxim Integrated Products
8
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Dual-Audio, Log Taper Digital Potentiometers MAX5408/MAX5409
ABSOLUTE MAXIMUM RATINGS
VDD, VLOGIC, CS, SCLK, DIN to GND ......................-0.3V to +6V H_, L_, and W_ to GND ..............................-0.3V to (VDD + 0.3V) DOUT to GND.............................................-0.3V to (VDD + 0.3V) AGND to GND .......................................................-0.3V to +0.3V Input and Output Latchup Immunity...............................200mA Maximum Continuous Current into H_, L_, and W_.........500A Continuous Power Dissipation (TA = +70C) QSOP (derate 8.3mW/C above +70C) ...................666.7mW QFN (derate 18.5mW/C above +70C) ....................1481mW Operating Temperature Range ...........................-40C to +85C Storage Temperature Range .............................-60C to +150C Maximum Junction Temperature .....................................+150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +3.6V, VH_ = VLOGIC, VL_ = 0, TA = TMIN to TMAX. Typical values are at TA = +25C, unless otherwise specified.)
PARAMETER End-to-End Resistance Maximum Bandwidth Absolute Tolerance Tap-to-Tap Tolerance Total Harmonic Distortion Channel Isolation Interchannel Matching Mute Attenuation Power-Supply Rejection Ratio Wiper Resistance Wiper Capacitance Digital Clock Feedthrough End-to-End Resistance Tempco Ratiometric Resistance Tempco DIGITAL INPUTS (VLOGIC > 4.5V) Input High Voltage Input Low Voltage Input Leakage Current Input Capacitance DIGITAL INPUTS (VLOGIC < 4.5V) Input High Voltage Input Low Voltage Input Leakage Current Input Capacitance DIGITAL OUTPUT Output High Voltage Output Low Voltage VOH VOL ISOURCE = 0.5mA ISINK = 2mA VLOGIC - 0.5 0.4 V V 5 VIH VIL 0.7 x VLOGIC 0. 3 x VLOGIC 1 V V A pF 5 VIH VIL 2.4 0.8 1 V V A pF TCR PSRR RW CW fSCLK = 20Hz to 20kHz, tap = -6dB f = 20Hz to 20kHz, tap = -6dB THD VIN = 1VRMS, f = 1kHz, tap = -6dB SYMBOL CONDITIONS MIN 7 100 0.25 0.1 0.002 -100 0.5 -90 -80 1000 10 -90 35 5 1700 TYP 10 MAX 13 UNITS kHz dB dB % dB dB dB dB pF dB ppm/C ppm/C
2
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Dual-Audio, Log Taper Digital Potentiometers
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V, VH_ = VLOGIC, VL_ = 0, TA = TMIN to TMAX. Typical values are at TA = +25C, unless otherwise specified.)
PARAMETER SCLK Clock Period SCLK Pulse Width High SCLK Pulse Width Low CS Fall to SCLK Rise Setup Time SCLK Rise to CS Rise Hold Time DIN Setup Time DIN Hold Time SCLK Fall to DOUT Valid Propagation Delay CS Rise to SCLK Rise Hold Time CS Pulse Width High Wiper Settling Time POWER SUPPLIES Supply Voltage Active Supply Current Standby Supply Current Logic Supply Voltage Logic Active Supply Current Logic Standby Supply Current SYMBOL tCP tCH tCL tCSS tCSH tDS tDH tDO tCS1 tCSW tIW VDD IDD VLOGIC ILOGIC fSCLK = 2MHz, DOUT = floating (Note 3) DOUT = floating (Note 2) 1 fSCLK = 2MHz, (Note 1) (Note 2) 2.7 0.2 Zero-Crossing Detect disabled 2.7 CLOAD = 200pF 40 100 1 3.6 100 10 5.5 120 10 CONDITIONS MIN 100 40 40 40 0 40 0 80 TYP MAX UNITS ns ns ns ns ns ns ns ns ns ns s V A V A
MAX5408/MAX5409
TIMING CHARACTERISTICS (Figure 1)
Note 1: Supply current measured while changing, wiper position with zero-crossing enabled. Note 2: Supply current measured while wiper position is fixed. Note 3: Supply current measured changing wiper position.
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Dual-Audio, Log Taper Digital Potentiometers MAX5408/MAX5409
Typical Operating Characteristics
(VDD = 5V, TA = +25C, unless otherwise specified)
WIPER RESISTANCE vs. WIPER VOLTAGE
MAX5408 toc01
END-TO-END RESISTANCE % CHANGE vs. TEMPERATURE
END-TO-END RESISTANCE CHANGE (%) 0.15 0.10 0.05 0 -0.05 -0.10 -0.15 -0.20 -40 -15 10 35 60 85
MAX5408 toc02
996 995 WIPER RESISTANCE () 994 993 992 991 990 989 VDD = 5V = VLOGIC, L_ = GND 988 0 TAP POSITION 31
0.20
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 WIPER VOLTAGE (V)
TEMPERATURE (C)
ATTENUATION vs. TAP POSITION
MAX5408 toc03
SUPPLY CURRENT vs. TEMPERATURE
I = IDD + ILOGIC 12 SUPPLY CURRENT (A)
MAX5408 toc04
0 -10 ATTENUATION (dB) -20 -30 -40 -50 -60 -70 0 4 8 12 16 20 24 28
15
9
6
3 VDD = VLOGIC = 5V 0 32 -40 -15 10 35 60 85 TAP POSITION TEMPERATURE (C)
TAP-TO-TAP SWITCHING TRANSIENT (ZERO-CROSSING DISABLE)
MAX5408 toc05
LOGIC CURRENT vs. LOGIC VOLTAGE
STANDBY SCLK = GND
MAX5408 toc06
0.30 0.25 SUPPLY CURRENT (A) 0.20 0.15 0.10 0.05 0
VW__ 2V/div
CS 2V/div VH_ = 5V VL_ = 0
4s/div
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
4
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Dual-Audio, Log Taper Digital Potentiometers MAX5408/MAX5409
Typical Operating Characteristics (continued)
(VDD = 5V, TA = +25C, unless otherwise specified)
LOGIC CURRENT vs. LOGIC VOLTAGE
MAX5480 toc07
SUPPLY CURRENT vs. SUPPLY VOLTAGE
0.50 0.45 0.40 0.35 IDD (A) 0.30 0.25 0.20 0.15 0.10 0.05 0 STANDBY ACTIVE ZERO-CROSSING DETECTION DISABLED
MAX5408 toc08
50 45 40 SUPPLY CURRENT (A) 35 30 25 20 15 10 5 0 2.5 3.0 3.5 4.0 4.5 5.0 ACTIVE MODE SCLK = 2MHz, O to VLOGIC
0.55
5.5
2.5
3.0
3.5
4.0 VDD (V)
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
Pin Description
PIN MAX5408 QFN 1 2 3 4 5 -- -- 8 9 10 11 12 13 14 15 16 6, 7 MAX5408 QSOP 3 4 5 6 7 -- -- 10 11 12 13 14 15 16 1 2 8, 9 MAX5409 QFN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 -- MAX5409 QSOP 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 -- NAME SCLK CS H0 L0 W0A W0B W1B W1A L1 H1 AGND GND VLOGIC VDD DOUT DIN N.C FUNCTION Serial Data Clock Input Chip Select for Wiper Control High Terminal of Resistor 0 Low Terminal of Resistor 0 Wiper Terminal A of Resistor 0 Wiper Terminal B of Resistor 0 Wiper Terminal B of Resistor 1 Wiper Terminal A of Resistor 1 Low Terminal of Resistor 1 High Terminal of Resistor 1 Analog Ground Ground Power Supply for Interface Logic Power Supply for Wiper Switches Serial Data Out Serial Data In Not Connected
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Dual-Audio, Log Taper Digital Potentiometers MAX5408/MAX5409
Table 1. Serial Interface Programming Commands for MAX5408
8-BIT SERIAL WORD A0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 A1 0 0 1 1 0 0 1 1 1 1 1 1 1 1 A2 0 1 0 1 0 1 0 0 0 0 0 0 1 1 D4-D0 5-bit DAC Data 5-bit DAC Data 5-bit DAC Data 5-bit DAC Data 4-bit Mute Data, D0 = "don't care" 4-bit Zero-Crossing Detection Data, D0 = "don't care" 00000 00001 00010 00011 00100 00101 D4 = 0, D3-D0 = "don't care D4 = 1, D3-D0 = "don't care" Undefined Program position of wiper W1A Undefined Data for mute register (see Table 3) Data for zero-crossing detection register (see Table 5) Return wiper register for W0A Undefined Return wiper register for W1A Undefined Return mute register Return zero-crossing detection register Analog power-down Analog power-up FUNCTION Program position of wiper W0A
Detailed Description
Digital Serial Interface
An SPI-compatible serial interface controls the MAX5408/MAX5409. The input word to the device is eight bits long, composed of three address bits (A0, A1, and A2), followed by five data bits, with MSB first (see Tables 1 and 2). The first three address bits set the value of internal registers. The five data bits control the wiper position. For certain commands, some of the five data bits are "don't cares", but must be sent to the device. The serial data is listed in Tables 1 and 2. The control code determines: * Potentiometer to update or register to set. * Data for mute register (Tables 3 and 4). * Data for zero-crossing detection register (Tables 5 and 6). The data bits control the position of the wiper (Table 7). A logic low on the chip-select input (CS) enables the device's serial interface. A logic high on CS disables the interface control circuitry. See Figure 1 for serialinterface timing description.
CS tCSS SCLK tDS SDIN tCH
tCL
tDH
DOUT
CS tCP SCLK tCSH tCSI
tCSW
SDIN tDO DOUT tIW WIPER
Figure 1. Serial Timing Diagram 6 _______________________________________________________________________________________
Dual-Audio, Log Taper Digital Potentiometers MAX5408/MAX5409
Table 2. Serial Interface Programming Commands for MAX5409
8-BIT SERIAL WORD A0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 A1 0 0 1 1 0 0 1 1 1 1 1 1 1 1 A2 0 1 0 1 0 1 0 0 0 0 0 0 1 1 D4-D0 5-bit DAC Data 5-bit DAC Data 5-bit DAC Data 5-bit DAC Data 4-bit Mute Data, D0 = "don't care" 4-bit Zero-Crossing Detection Data, D0 = "don't care" 00000 00001 00010 00011 00100 00101 D4 = 0, D3-D0 = "don't care D4 = 1, D3-D0 = "don't care" FUNCTION Program position of wiper W0A Program position of wiper W0B Program position of wiper W1A Program position of wiper W1B Data for mute register (see Table 4) Data for zero-crossing detection register (see Table 6) Return wiper register for W0A Return wiper register for W0B Return wiper register for W1A Return wiper register for W1B Return mute register Return zero-crossing detection register Analog power-down Analog power-up
Table 3. Mute Register Bit Definitions for MAX5408
DATA BIT D4 D3 D2 D1 D0 VALUE 0 1 "don't care" 0 1 "don't care" "don't care" Set wiper W0A to L0 Undefined Set wiper W1A to preprogrammed value (-62dB on power-up) Set wiper W1A to L0 Undefined Undefined FUNCTION Set wiper W0A to preprogrammed value (-62dB on power-up)
Table 4. Mute Register Bit Definitions for MAX5409
DATA BIT D4 D3 D2 D1 D0 VALUE 0 1 0 1 0 1 0 1 "don't care" Set wiper W0A to L0 Set wiper W0B to preprogrammed value (-62dB on power-up) Set wiper W0B to L0 Set wiper W1A to preprogrammed value (-62dB on power-up) Set wiper W1A to L1 Set wiper W1B to preprogrammed value (-62dB on power-up) Set wiper W1B to L1 Undefined FUNCTION Set wiper W0A to preprogrammed value (-62dB on power-up)
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7
Dual-Audio, Log Taper Digital Potentiometers MAX5408/MAX5409
Table 5. Zero-Crossing Detection Register Bit Definitions for MAX5408
DATA BIT D4 D3 D2 D1 D0 VALUE 0 1 "don't care" 0 1 "don't care" "don't care" FUNCTION Disable wiper W0A zero-crossing detection circuit Enable wiper W0A zero-crossing detection circuit Undefined Disable wiper W1A zero-crossing detection circuit Enable wiper W1A zero-crossing detection circuit Undefined Undefined
Table 6. Zero-Crossing Detection Register Bit Definitions for MAX5409
DATA BIT D4 D3 D2 D1 D0 VALUE 0 1 0 1 0 1 0 1 "don't care" FUNCTION Disable wiper W0A zero-crossing detection circuit Enable wiper W0A zero-crossing detection circuit Disable wiper W0B zero-crossing detection circuit Enable wiper W0B zero-crossing detection circuit Disable wiper W1A zero-crossing detection circuit Enable wiper W1A zero-crossing detection circuit Disable wiper W1B zero-crossing detection circuit Enable wiper W1B zero-crossing detection circuit Undefined
Table 7. Attenuation and Wiper Position
POSITION 0 1 2 3 4 . . . . . 30 31 MUTE OUTPUT LEVEL (dB) 0 -2 -4 -6 -8 . . . . . -60 -62 <-90
A readback request overwrites any previous data in the shift register. Note that the data appears at DOUT in the order: A0, A1, A2, D4, D3, D2, D1, D0. A0 will be available after the first high-to-low transition of SCLK when CS is low. The input continues to load the shift register while data is being read out of the MAX5408/ MAX5409. The input data appears at DOUT 8.5 clock cycles later. A CS transition from low-to-high latches the input data. For any control byte, the state of SCLK must be the same for both CS low-to-high transitions and CS high-to-low transitions, in order to preserve the data at DOUT while CS transitions.
Zero-Crossing Detection
The zero-crossing detection register enables the zerocrossing detect feature. The zero-crossing detect feature reduces the audible noise ("clicks and pops") that result from wiper transitions. The wiper changes position only when the voltage at L_ is the same as the voltage at H_. The MAX5408/MAX5409 timeout and change the wiper position, if after 50ms no zero-crossing is detected.
The digital output, DOUT, lags the digital input signal, DIN by 8.5 clock cycles. Force CS high to disable DOUT, placing DOUT in three-state mode. Force CS low to enable DOUT and disable three-state mode. Force CS high, after a word has been written to the MAX5408/MAX5409 to make a readback request. The next CS low period writes the requested data to DOUT.
8
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Dual-Audio, Log Taper Digital Potentiometers MAX5408/MAX5409
Power-On Reset
The power-on reset (POR) feature sets the wiper to the maximum attenuation (tap position 31, -62 dB) at powerup. with a fixed gain. The digitally controlled potentiometer attenuates the input signal.
Stereo Volume Control
Figure 3 shows the application of stereo volume control. The op amps are connected in a follower configuration with fixed gain. The digitally controlled potentiometer attenuates the input signals. The second wiper of each potentiometer controls the signal amplitude at the rear set of speakers.
Mute Function
When mute is enabled, the wiper stays at its previous position. If a command to update the wiper position is issued when the device is in mute, the wiper will be set to its new position when mute is removed.
Applications Information
Attenuation Control
Figure 2 shows the application of an attenuation control. The op amps are connected in a follower configuration
VIN0 H0 VIN1 H1
Daisy-Chaining
Figure 4 shows an application daisy-chaining the serial-interfaces of the MAX5408/MAX5409. A singlewrite command updates multiple devices from a single digital port in this configuration (see Digital Serial Interface section).
Gain Control
Figure 5 shows the application of a gain control. Note: Muting the potentiometer creates unpredictable behavior at the output of the op amp, and may seriously degrade the performance of the op amp.
VOUT0
W0A
MAX5408 MAX5409
W1A
VOUT1
L0
L1
Figure 2. Attenuation Control
VLEFT VRIGHT
VLEFTF
W0A
H0
H1
W1A
VRIGHTF
MAX5409
VLEFTR
W0B L0 L1
W1B
VRIGHTR
Figure 3. Stereo Volume Control with Front and Rear Fade _______________________________________________________________________________________ 9
Dual-Audio, Log Taper Digital Potentiometers MAX5408/MAX5409
SCLK
H0
SCLK SCLK SCLK
H1 VIN1
VIN0
DOUT
SDIN
SDIN
DOUT
SDIN
DOUT
SDIN
VOUT0
W0A
MAX5408 MAX5409
W1A
VOUT1
CS
MAX5408 MA5409
CS
MAX5408 MA5409
CS
MAX5408 MA5409
L0
L1
CS
Figure 4. Daisy-Chaining of Serial Interfaces
Figure 5. Gain Control
Chip Information
TRANSISTOR COUNT: 12759 PROCESS: BiCMOS
10
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Dual-Audio, Log Taper Digital Potentiometers
Functional Diagram
MAX5408/MAX5409
W0A
H0
N.C.(W0B) DOUT
W1A
H1
N.C.(W1B)
MAX5408 MAX5409
32 POSITION DECODER/ REGISTER
AUDIO ZEROCROSSING DETECTOR
SPI LOGIC
VLOGIC VDD ( ) ARE FOR MAX5409 ONLY
L0
SCLK
SDIN
CS
L1
GND AGND
______________________________________________________________________________________
11
Dual-Audio, Log Taper Digital Potentiometers MAX5408/MAX5409
Package Information
12, 16,20, 24L QFN.EPS
12 _______________________________________________________________________________________
Dual-Audio, Log Taper Digital Potentiometers
Package Information (continued)
QSOP,EXP. PADS.EPS
MAX5408/MAX5409
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
13 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.


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